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PRESS RELEASE

Contact:
Michael O'Brien
Aldec Inc.
(702) 990-4400 ext. 207
mobrien@aldec.com

A New Graphical Code Coverage Tool Speeds Design Debugging

Henderson Nevada, January 26, 2001 - Aldec Inc., a leading supplier of HDL design entry and verification software for programmable logic devices, announced today Code Snooper, a code coverage software tool for use with the Active-HDLT design and verification environment. Code Snooper is tightly integrated with the Active-HDL simulation kernel and does not require additional compilations like other code coverage tools, consequently saving time for designers. Because of the growing complexity of today's designs, designers are spending considerably more time on design verification than on conceptual work. Code Snooper makes design verification and optimization much easier and is the best tool for coping with large designs.

New Capabilities
Since Code Snooper can be run in parallel with simulation, it provides on-line analysis of code efficiency and testing quality. The code coverage tool checks for execution of all VHDL and Verilog statements during simulation and provides a detailed report indicating which parts of source code were not covered by the testbench and which VHDL or Verilog statements were not executed. Code Snooper speeds design development processes by pointing to design segments that need additional or expanded testbenches.

"This code coverage tool vastly expands debugging capabilities of the Active-HDL environment by pointing the user's attention to the weakest design spots," stated Michael O'Brien, Aldec Product Marketing Manager.

Major Benefits of Code Snooper
Code Snooper provides several significant benefits to the designer. First, the user can instantly find the design sections that have not been exercised by the testbench, allowing quick corrections of the testbench for the untested sections. Second, by examining each executable statement for the number of times it has been executed, Code Snooper identifies the most frequently executed design sections, allowing the user to optimize these design sections for performance Lastly, by measuring the effectiveness of testbenches, Code Snooper allows prioritizing of the testbenches so that the most effective ones run first. This produces faster warnings about design bugs during long regression tests. The tool also provides verification of all VHDL, Verilog and C/C testbenches.

Code Snooper Viewer
When a designer invokes and runs Code Snooper, its findings are stored in the designer -defined file. Using the Code Snooper Viewer, the user can then display in graphical form the design's quality and testability information. The code coverage is measured as a ratio of executed statements to the total number of executable statements in the instance. This figure is provided as a percentage (%).

Availability
Code Snooper will be available January 26, 2001, and will be included at no cost in the Expert Edition of Active-HDL. The Standard and Plus Editions of Active-HDL include HDL, State Machine, and Block Diagram & Editors; Automatic Testbench Generation; Waveform Viewer/Editor; choice of VHDL, Verilog or mixed VHDL/Verilog/EDIF simulation and they offer Code Snooper as an add on option at $3,500.00. To request your FREE evaluation copy of Active-HDL and Code Snooper, contact Aldec at 1-800-487-8743 or visit Aldec online and download it at www.aldec.com.

About Aldec
Aldec has offered PC-based design entry and simulation solutions to FPGA designers for more than 16 years. During this time, Aldec has signed several OEM agreements with IC vendors, such as Xilinx, Inc. (NASDAQ:XLNX) and Cypress Semiconductor Corp. (NYSE:CY) Aldec, Inc., headquartered in Henderson, Nevada, produces a universal suite of Windows-based EDA tools that allow design engineers to implement their projects using several different design entry methods (Schematic Capture, State Machine, Block Diagram, VHDL, Verilog or ABEL). Aldec incorporates patented simulation technology and several design entry tools to provide a complete design entry and simulation solution. Founded in 1984, the company continues to evolve in the Windows-based EDA market as the fastest growing privately held EDA supplier in the world. Additional information about Aldec is available at www.aldec.com.


Active-HDL is a trademark of Aldec, Inc. All other trademarks or registered trademarks are property of their respective owners

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